View HFA1120_169229.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

HFA1120/883
July 1994
850MHz Current Feedback Amplifier with Offset Adjust
Description
The HFA1120/883 is a high speed, wideband, fast settling current feedback amplifier. Built with Intersil' proprietary, complementary bipolar UHF-1 process, it is the fastest monolithic amplifier available from any semiconductor manufacturer. The HFA1120/883's wide bandwidth, fast settling characteristic, and low output impedance, make this amplifier ideal for driving fast A/D converters. Additionally, it offers offset voltage nulling capabilities as described in the "Offset Adjustment" section of this datasheet. Component and composite video systems will also benefit from this amplifier's performance, as indicated by the excellent gain flatness, and 0.03%/0.05 Degree Differential Gain/ Phase specifications (RL = 75).
Features
* This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. * Low Distortion (HD3, 30MHz) . . . . . . . . . . -84dBc (Typ) * Wide -3dB Bandwidth . . . . . . . . . . . . . . . 850MHz (Typ) * Very High Slew Rate . . . . . . . . . . . . . . . 2300V/s (Typ) * Fast Settling (0.1%) . . . . . . . . . . . . . . . . . . . . 11ns (Typ) * Excellent Gain Flatness (to 50MHz) . . . . . 0.05dB (Typ) * High Output Current . . . . . . . . . . . . . . . . . . 65mA (Typ) * Fast Overdrive Recovery. . . . . . . . . . . . . . . <10ns (Typ)
Applications
* Video Switching and Routing * Pulse and Video Amplifiers * Wideband Amplifiers * RF/IF Signal Processing * Flash A/D Driver * Medical Imaging Systems
Ordering Information
PART NUMBER HFA1120MJ/883 TEMPERATURE RANGE -55oC to +125oC PACKAGE 8 Lead CerDIP
Pinout
HFA1120/883 (CERDIP) TOP VIEW
BAL -IN +IN V-
1 2 3 4 +
8 7 6 5
NC V+ OUT BAL
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
Spec Number
3-199
511105-883 File Number 3617.1
Specifications HFA1120/883
Absolute Maximum Ratings
Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V Voltage at Either Input Terminal . . . . . . . . . . . . . . . . . . . . . . V+ to VOutput Current (50% Duty Cycle) . . . . . . . . . . . . . . . . . . . . . . . .55mA Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC ESD Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <2000V Storage Temperature Range . . . . . . . . . . . . . . -65oC TA +150oC Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300oC
Thermal Information
Thermal Resistance JA JC CerDIP Package . . . . . . . . . . . . . . . . . . . 115oC/W 30oC/W Maximum Package Power Dissipation at +75oC CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.87W Package Power Dissipation Derating Factor above +75oC CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.7mW/oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Operating Supply Voltage (VS) . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V Operating Temperature Range . . . . . . . . . . . . .-55oC TA +125oC RL 50
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS Device Tested at: VSUPPLY = 5V, AV = +1, RF = 510, RSOURCE = 0, RL = 100, VOUT = 0V, Unless Otherwise Specified. GROUP A SUBGROUPS 1 2, 3 Common Mode Rejection Ratio Power Supply Rejection Ratio CMRR VCM = 2V V+ = 3V, V- = -7V V+ = 7V, V- = -3V VSUP = 1.25V V+ = 6.25V, V- = -5V V+ = 3.75V, V- = -5V VSUP = 1.25V V+ = 5V, V- = -6.25V V+ = 5V, V- = -3.75V VCM = 0V VCM = 2V V+ = 3V, V- = -7V V+ = 7V, V- = -3V Note 1 1 2, 3 1 2, 3 1 2, 3 1 2, 3 CMSIBP 1 2, 3 1 2, 3 Inverting Input (-IN) Current -IN Current Adjust Range -IN Current Common Mode Sensitivity -IN Current Power Supply Sensitivity IBSN ADJIBN CMSIBN VCM = 0V VCM = 0V, Note 3 VCM = 2V V+ = 3V, V- = -7V V+ = 7V, V- = -3V VSUP = 1.25V V+ = 6.25V, V- = -5V V+ = 3.75V, V- = -5V VSUP = 1.25V V+ = 5V, V- = -6.25V V+ = 5V, V- = -3.75V AV = -1 RL = 100 AV = -1 RL = 100 VIN = -3.5V VIN = -3V VIN = +3.5V VIN = +3V 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 LIMITS TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC MIN -6 -10 40 38 45 42 45 42 -40 -65 25 20 -50 -75 100 100 3 2.5 MAX 6 10 40 65 40 50 50 75 -100 -100 7 10 15 27 15 27 -3 -2.5 UNITS mV mV dB dB dB dB dB dB A A A/V A/V k k A A A A A/V A/V A/V A/V A/V A/V V V V V
PARAMETERS Input Offset Voltage
SYMBOL VIO
CONDITIONS VCM = 0V
PSRRP
PSRRN
+25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC
Non-Inverting Input (+IN) Current +IN Current Common Mode Sensitivity +IN Resistance
IBSP
+RIN
PPSSIBN
NPSSIBN
+25oC +125oC, -55oC +25oC +125oC, +125oC, -55oC -55oC +25oC
Output Voltage Swing
VOP100 VON100
Spec Number 3-200
511105-883
Specifications HFA1120/883
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) Device Tested at: VSUPPLY = 5V, AV = +1, RF = 510, RSOURCE = 0, RL = 100, VOUT = 0V, Unless Otherwise Specified. GROUP A SUBGROUPS 1, 2 3 1, 2 3 1, 2 3 -IOUT Quiescent Power Supply Current ICC IEE NOTES: 1. Guaranteed from +IN Common Mode Rejection Test, by: +RIN = 1/CMSIBP . 2. Guaranteed from VOUT Test with RL = 50, by: IOUT = VOUT/50. 3. This is the minimum change in inverting input bias current when a BAL pin is connected to V- through a 50 resistor. Note 2 1, 2 3 RL = 100 RL = 100 1 2, 3 1 2, 3 LIMITS TEMPERATURE +25oC, +125oC -55oC +25oC, +125oC -55oC +25oC, +25oC, +125oC +125oC -55oC -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC MIN 2.5 1.5 50 30 14 -26 -33 MAX -2.5 -1.5 -50 -30 26 33 -14 UNITS V V V V mA mA mA mA mA mA mA mA
PARAMETERS Output Voltage Swing
SYMBOL VOP50 VON50
CONDITIONS AV = -1 RL = 50 AV = -1 RL = 50 Note 2 VIN = -3V VIN = -2V VIN = +3V VIN = +2V
Output Current
+IOUT
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS Table 2 Intentionally Left Blank.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS Device Characterized at: VSUPPLY = 5V, AV = +2, RF = 360, RL = 100, Unless Otherwise Specified. LIMITS PARAMETERS -3dB Bandwidth SYMBOL BW(-1) BW(+1) BW(+2) Gain Flatness GF30 GF50 GF100 Slew Rate +SR(+1) -SR(+1) +SR(+2) -SR(+2) Rise and Fall Time TR TF CONDITIONS AV = -1, RF = 430 VOUT = 200mVP-P AV = +1, RF = 510 VOUT = 200mVP-P AV = +2, VOUT = 200mVP-P AV = +2, RF = 510, f 30MHz VOUT = 200mVP-P AV = +2, RF = 510, f 50MHz VOUT = 200mVP-P AV = +2, RF = 510, f 100MHz VOUT = 200mVP-P AV = +1, RF = 510 VOUT = 5VP-P AV = +1, RF = 510 VOUT = 5VP-P AV = +2, VOUT = 5VP-P AV = +2, VOUT = 5VP-P AV = +2, VOUT = 0.5VP-P AV = +2, VOUT = 0.5VP-P NOTES 1 1 1 1 1 1 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 TEMPERATURE +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC MIN 300 550 350 1200 1100 1650 1500 MAX 0.04 0.10 0.30 1 1 UNITS MHz MHz MHz dB dB dB V/s V/s V/s V/s ns ns
Spec Number 3-201
511105-883
Specifications HFA1120/883
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) Device Characterized at: VSUPPLY = 5V, AV = +2, RF = 360, RL = 100, Unless Otherwise Specified. LIMITS PARAMETERS Overshoot SYMBOL +OS -OS Settling Time TS(0.1) TS(0.05) 2nd Harmonic Distortion HD2(30) HD2(50) HD2(100) 3rd Harmonic Distortion HD3(30) HD3(50) HD3(100) NOTES: 1. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested at final production. These parameters are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization based upon data from multiple production runs which reflect lot-to-lot and within lot variation. 2. Measured between 10% and 90% points. 3. For 200ps input transition times. Overshoot decreases as input transition times increase, especially for AV = +1. Please refer to Performance Curves. CONDITIONS AV = +2, VOUT = 0.5VP-P AV = +2, VOUT = 0.5VP-P AV = +2, RF = 510 VOUT = 2V to 0V, to 0.1% AV = +2, RF = 510 VOUT = 2V to 0V, to 0.05% AV = +2, f = 30MHz VOUT = 2VP-P AV = +2, f = 50MHz VOUT = 2VP-P AV = +2, f = 100MHz VOUT = 2VP-P AV = +2, f = 30MHz VOUT = 2VP-P AV = +2, f = 50MHz VOUT = 2VP-P AV = +2, f = 100MHz VOUT = 2VP-P NOTES 1, 3 1, 3 1 1 1 1 1 1 1 1 TEMPERATURE +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC MIN MAX 25 20 20 33 -48 -45 -35 -65 -60 -40 UNITS % % ns ns dBc dBc dBc dBc dBc dBc
TABLE 4. ELECTRICAL TEST REQUIREMENTS MIL-STD-883 TEST REQUIREMENTS Interim Electrical Parameters (Pre Burn-In) Final Electrical Test Parameters Group A Test Requirements Groups C and D Endpoints NOTE: 1. PDA applies to Subgroup 1 only. SUBGROUPS (SEE TABLE 1) 1 1 (Note 1), 2, 3 1, 2, 3 1
Spec Number 3-202
511105-883
HFA1120/883 Die Characteristics
DIE DIMENSIONS: 63 x 44 x 19 mils 1 mils 1600 x 1130 x 483m 25.4m METALLIZATION: Type: Metal 1: AICu(2%)/TiW Thickness: Metal 1: 8kA 0.4kA GLASSIVATION: Type: Nitride Thickness: 4kA 0.5kA WORST CASE CURRENT DENSITY: 2.0 x 105 A/cm2 at 47.5mA TRANSISTOR COUNT: 52 SUBSTRATE POTENTIAL (Powered Up): Floating (Recommend Connection to V-) Type: Metal 2: AICu(2%) Thickness: Metal 2: 16kA 0.8kA
Metallization Mask Layout
HFA1120/883
+IN
-IN
V-
VL
BAL
BAL
VH
V+
OUT
Spec Number 3-203
511105-883
HFA1120/883 Test Circuit (Applies to Table 1)
V+ ICC VIN K1 NC K2 = POSITION 1: VX VIO = 100 VX x100 K2 = POSITION 2: VX -IBIAS = 50K 200pF 100K (0.01%) 10 0.1 K3 + HA-5177 0.1 IEE 0.1 0.1 NC NC K4 K2 + 0.1 0.1 0.1 510 510 7 2 470pF
2 1
+
10
0.1
0.1 100
DUT 1 4 5 50 50
510 3+ 510
6
1K VOUT 100 100
K5
VZ +IBIAS = 100K VZ
+
V-
NOTE: All Resistors = 1% () All Capacitors = 10% (F) Unless Otherwise Noted Chip Components Recommended
Test Waveforms
SIMPLIFIED TEST CIRCUIT FOR LARGE AND SMALL SIGNAL PULSE RESPONSE (Applies to Table 3) AV = +1 TEST CIRCUIT
V+ VOUT 50 2 50
AV = +2 TEST CIRCUIT
V+ VOUT RF 50 360 RG 360 2 50
VIN RS 50 RF
+ -
VIN RS 50
+ -
510 VV-
NOTE: VS = 5V, AV = +1 RS = 50 RL = 100 For Small and Large Signals
NOTE: VS = 5V, AV = +2 RS = 50 RL=100 For Small and Large Signals
LARGE SIGNAL WAVEFORM
VOUT +2.5V 90% 90% +2.5V VOUT +250mV
SMALL SIGNAL WAVEFORM
90%
90%
+250mV
+SR -2.5V 10% 10%
-SR -2.5V
TR , +OS -250mV 10% 10%
TF , -OS -250mV
Spec Number 3-204
511105-883
HFA1120/883 Burn-In Circuit
HFA1120MJ/883 CERAMIC DIP
R3
R2 R1 D4 VD2 C2
1 2 3 4
8
D3 V+ C1 D1
+
7 6 5
NOTES: R1 = R2 = 1k, 5% (Per Socket) R3 = 10k, 5% (Per Socket) C1 = C2 = 0.01F (Per Socket) or 0.1F (Per Row) Minimum D1 = D2 = 1N4002 or Equivalent (Per Board) D3 = D4 = 1N4002 or Equivalent (Per Socket) V+ = +5.5V 0.5V V- = -5.5V 0.5V
Spec Number 3-205
511105-883
HFA1120/883 Packaging
c1 -A-DBASE METAL E b1 M -Bbbb S BASE PLANE SEATING PLANE S1 b2 b ccc M C A-B S AA C A-B S D Q -CA L DS M (b) SECTION A-A (c) LEAD FINISH
F8.3A MIL-STD-1835 GDIP1-T8 (D-4, CONFIGURATION A)
8 LEAD DUAL-IN-LINE FRIT-SEAL CERAMIC PACKAGE INCHES SYMBOL A b b1 b2 b3 c c1 MIN 0.014 0.014 0.045 0.023 0.008 0.008 0.220 MAX 0.200 0.026 0.023 0.065 0.045 0.018 0.015 0.405 0.310 MILLIMETERS MIN 0.36 0.36 1.14 0.58 0.20 0.20 5.59 MAX 5.08 0.66 0.58 1.65 1.14 0.46 0.38 10.29 7.87 2.54 BSC 7.62 BSC 3.81 BSC 3.18 0.38 0.13 0.13 90o 8 5.08 1.52 105o 0.38 0.76 0.25 0.038 NOTES 2 3 4 2 3 5 5 6 7 2 8
eA
D E e eA eA/2 L Q S1 S2
0.100 BSC 0.300 BSC 0.150 BSC 0.125 0.015 0.005 0.005 90o 8 0.200 0.060 105o 0.015 0.030 0.010 0.0015
e
DS
eA/2
c
aaa M C A - B S D S
NOTES: 1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer's identification shall not be used as a pin one identification mark. 2. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 3. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness. 4. Corner leads (1, N, N/2, and N/2+1) may be configured with a partial lead paddle. For this configuration dimension b3 replaces dimension b1. 5. This dimension allows for off-center lid, meniscus, and glass overrun. 6. Dimension Q shall be measured from the seating plane to the base plane. 7. Measure dimension S1 at all four corners. 8. N is the maximum number of terminal positions. 9. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 10. Controlling Dimension: Inch 11. Lead Finish: Type A. 12. Materials: Compliant to MIL-I-38535.
aaa bbb ccc M N
Spec Number 3-206
511105-883
Semiconductor
HFA1120
Ultra High Speed Current Feedback Amplifier with Offset Adjust
DESIGN INFORMATION
August 1999
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied.
Typical Performance Curves VSUPPLY = 5V, RF = 510, RL = 100, TA = +25C, Unless Otherwise Specified
SMALL SIGNAL PULSE RESPONSE (AV = +2)
120 90 OUTPUT VOLTAGE (mV) OUTPUT VOLTAGE (V) 60 30 0 -30 -60 -90 -120 5ns/DIV 5ns/DIV
LARGE SIGNAL PULSE RESPONSE (AV = +2)
1.2 0.9 0.6 0.3 0 -0.3 -0.6 -0.9 -1.2
NON-INVERTING FREQUENCY RESPONSE (VOUT = 200mVP-P)
GAIN
INVERTING FREQUENCY RESPONSE (VOUT = 200mVP-P)
0 GAIN AV = -1 AV = -5 AV = -10 -9 -12 PHASE 180 AV = -1 AV = -5 AV = -10 AV = -20 90 0 -90 -180 1K AV = -20 PHASE (DEGREES)
0 -3 GAIN (dB) NORMALIZED -6 -9 -12
AV = +1 GAIN (dB) NORMALIZED PHASE (DEGREES) AV = +2 AV = +6 AV = +11 PHASE
-3 -6
0 AV = +1 AV = +2 AV = +6 AV = +11 -90
-180 -270 -360 1K 0.3 1
0.3
1
10 100 FREQUENCY (MHz)
10 100 FREQUENCY (MHz)
Spec Number 3-207
511105-883
HFA1120
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied.
Typical Performance Curves VSUPPLY = 5V, RF = 510, RL = 100, TA = +25C, Unless Otherwise Specified
FREQUENCY RESPONSE FOR VARIOUS LOAD RESISTORS (AV = +1, VOUT = 200mVP-P)
+6 +3 0 GAIN (dB) -3 -6 PHASE GAIN RL = 100 RL = 50 RL = 50 RL = 100 PHASE (DEGREES) RL = 1k GAIN (dB) NORMALIZED +3 0 -3 -6 PHASE RL = 50 RL = 100 RL = 100 RL = 50 0 -90 RL = 1k -180 RL = 100 RL = 1k 0.3 1 10 100 FREQUENCY (MHz) 1K -270 -360 GAIN PHASE (DEGREES) RL = 1k
FREQUENCY RESPONSE FOR VARIOUS LOAD RESISTORS (AV = +2, VOUT = 200mVP-P)
0 -90
RL = 1k RL = 100 RL = 1k 0.3 1 10 100 FREQUENCY (MHz) 1K
-180 -270 -360
FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES (AV = +1)
+20
FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES (AV = +2)
+20 GAIN (dB) NORMALIZED +10 0 -10 -20 -30 0.32VP-P 1.00VP-P 1.84VP-P 3.26VP-P
+10 0 GAIN (dB) -10 -20 -30 0.160VP-P 0.500VP-P 0.920VP-P 1.63VP-P
0.3
1
10 100 FREQUENCY (MHz)
1K
0.3
1
10 100 FREQUENCY (MHz)
1K
FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES (AV = +6)
+20 GAIN (dB) NORMALIZED +10 0 -10 -20 -30 0.96 VP-P
TO
-3dB BANDWIDTH vs TEMPERATURE (AV = +1)
950 BANDWIDTH (MHz) 900 850 800 750 700
3.89 VP-P
0.3
1
10 FREQUENCY (MHz)
100
1K
-50
-25
0 +25 +50 +75 +100 +125 TEMPERATURE (oC)
Spec Number 3-208
511105-883
HFA1120
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied.
Typical Performance Curves VSUPPLY = 5V, RF = 510, RL = 100, TA = +25C, Unless Otherwise Specified
GAIN FLATNESS (AV = +2)
+2.0 +1.5 DEVIATION (DEGREES) 0 GAIN (dB) -0.05 -0.10 -0.15 -0.20 +1.0 +0.5 0 -0.5 -1.0 -1.5 -2.0 0 15 30 45 60 75 90 105 120 FREQUENCY (MHz) 135 150
DEVIATION FROM LINEAR PHASE (AV = +2)
1
10 FREQUENCY (MHz)
100
SETTLING RESPONSE (AV = +2, VOUT = 2V)
3rd ORDER INTERMODULATION INTERCEPT (2-TONE)
40 35 30 25 20 15 10 5 0 0 100
0.6 SETTLING ERROR (%) 0.4 0.2 0 -0.2 -0.4 -0.6
INTERCEPT POINT (dBm)
-4
1
6
11
16 21 26 TIME (ns)
31
36
41
46
200 300 FREQUENCY (MHz)
400
2nd HARMONIC DISTORTION vs POUT
-30 -35 -40 DISTORTION (dBc) DISTORTION (dBc) 100MHz -45 -50 -55 -60 -65 -70 -5 -3 -1 1 5 7 9 3 OUTPUT POWER (dBm) 11 13 15 30MHz 50MHz -30 -40 -50
3rd HARMONIC DISTORTION vs POUT
100MHz -60 -70 -80 -90 -100 -110 -5 -3 -1 1 3 5 7 9 11 13 15 OUTPUT POWER (dBm) 30MHz 50MHz
Spec Number 3-209
511105-883
HFA1120
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied.
Typical Performance Curves VSUPPLY = 5V, RF = 510, RL = 100, TA = +25C, Unless Otherwise Specified
OVERSHOOT vs INPUT RISE TIME (AV = +1)
38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 35 30 VOUT = 1VP-P OVERSHOOT (%) 25 RF = 360 20 VOUT = 0.5VP-P 15 10 5 0 100 200 300 400 500 600 700 800 900 1000 100 200 300 400 500 600 700 800 900 1000 INPUT RISE TIME (ps) RF =510 VOUT = 1VP-P RF = 510 VOUT = 0.5VP-P RF = 510 VOUT = 2VP-P RF = 360 VOUT = 1VP-P
OVERSHOOT vs INPUT RISE TIME (AV = +2)
RF = 360 VOUT = 2VP-P
OVERSHOOT (%)
VOUT = 0.5VP-P
VOUT = 2VP-P
INPUT RISE TIME (ps)
OVERSHOOT vs FEEDBACK RESISTOR (AV = +2, tR = 200ps, VOUT = 2VP-P)
36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 360 400 440 480 520 560 600 640 680 FEEDBACK RESISTOR () 25 24 SUPPLY CURRENT (mA) 23 22 21 20 19 18 -60
SUPPLY CURRENT vs TEMPERATURE
OVERSHOOT (%)
-40
-20
0
+20
+40
+60
+80 +100 +120
TEMPERATURE (oC)
SUPPLY CURRENT vs SUPPLY VOLTAGE
22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 5 6 7 8 9 TOTAL SUPPLY VOLTAGE (V+ - V-, V) 10 2.8 2.7 2.6 2.5 2.4 2.3 2.2 2.1 2 1.9 1.8 1.7 1.6 1.5 1.4 1.3
VIO AND BIAS CURRENTS vs TEMPERATURE
45 42 39 36 33 30 27 24 21 18 15 12 9 6 3 0
INPUT OFFSET VOLTAGE (mV)
SUPPLY CURRENT (mA)
+IBIAS
VIO
-IBIAS
-60
-40
-20
0 +20 +40 +60 +80 +100 +120 TEMPERATURE (oC)
Spec Number 3-210
511105-883
BIAS CURRENTS (A)
HFA1120
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied.
Typical Performance Curves VSUPPLY = 5V, RF = 510, RL = 100, TA = +25C, Unless Otherwise Specified
OUTPUT VOLTAGE vs TEMPERATURE (AV = -1, RL = 50)
3.7 3.6 NOISE VOLTAGE (nV/Hz) OUTPUT VOLTAGE (V) 3.5 3.4 3.3 3.2 3.1 3 2.9 2.8 2.7 2.6 2.5 -60 -40 -20 0 +20 +40 +60 +80 +100 +120 TEMPERATURE (oC) 0 100 1K 10K FREQUENCY (Hz) | - VOUT | +VOUT 30 25 20 15 10 5 300 275 250 225 200 175 150 125 100 75 ENI eni INIiniINI+ ini+ 100K 50 25 0 NOISE CURRENT (pA/Hz)
INPUT NOISE vs FREQUENCY
Spec Number 3-211
511105-883
HFA1120
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied.
Application Information
Optimum Feedback Resistor The enclosed plots of inverting and non-inverting frequency response illustrate the performance of the HFA1120 in various gains. Although the bandwidth dependency on closed loop gain isn't as severe as that of a voltage feedback amplifier, there can be an appreciable decrease in bandwidth at higher gains. This decrease may be minimized by taking advantage of the current feedback amplifier's unique relationship between bandwidth and RF . All current feedback amplifiers require a feedback resistor, even for unity gain applications, and RF , in conjunction with the internal compensation capacitor, sets the dominant pole of the frequency response. Thus, the amplifier's bandwidth is inversely proportional to RF . The HFA1120 design is optimized for a 510 RF at a gain of +1. Decreasing RF in a unity gain application decreases stability, resulting in excessive peaking and overshoot. At higher gains the amplifier is more stable, so RF can be decreased in a tradeoff of stability for bandwidth. The table below lists recommended RF values for various gains, and the expected bandwidth.
GAIN (ACL) -1 +1 +2 +5 +10 +19 RF () 430 510 360 150 180 270 BANDWIDTH (MHz) 580 850 670 520 240 125
in pulse overshoot and possible instability. To this end, it is recommended that the ground plane be removed under traces connected to -IN, and connections to -IN should be kept as short as possible. An example of a good high frequency layout is the Evaluation Board shown in Figure 2.
Driving Capacitive Loads
Capacitive loads, such as an A/D input, or an improperly terminated transmission line will degrade the amplifier's phase margin resulting in frequency response peaking and possible oscillations. In most cases, the oscillation can be avoided by placing a resistor (RS) in series with the output prior to the capacitance. Figure 1 details starting points for the selection of this resistor. The points on the curve indicate the RS and CL combinations for the optimum bandwidth, stability, and settling time, but experimental fine tuning is recommended. Picking a point above or to the right of the curve yields an overdamped response, while points below or left of the curve indicate areas of underdamped performance. RS and CL form a low pass network at the output, thus limiting system bandwidth well below the amplifier bandwidth of 850MHz. By decreasing RS as CLincreases (as illustrated in the curves), the maximum bandwidth is obtained without sacrificing stability. Even so, bandwidth does decrease as you move to the right along the curve. For example, at AV = +1, RS = 50, CL = 30pF, the overall bandwidth is limited to 300MHz, and bandwidth drops to 100MHz at AV = +1, RS = 5, CL = 340pF.
50 45 40 35 AV = +1
PC Board Layout
The frequency response of this amplifier depends greatly on the amount of care taken in designing the PC board. The use of low inductance components such as chip resistors and chip capacitors is strongly recommended, while a solid ground plane is a must! Attention should be given to decoupling the power supplies. A large value (10F) tantalum in parallel with a small value (0.1F) chip capacitor works well in most cases. Terminated microstrip signal lines are recommended at the input and output of the device. Capacitance directly on the output must be minimized, or isolated as discussed in the next section. Care must also be taken to minimize the capacitance to ground seen by the amplifier's inverting input (-IN). The larger this capacitance, the worse the gain peaking, resulting
RS ()
30 25 20 15 10 5 A = +2 V 0 0 40 80 120 160 200 240 280 320 360 400
LOAD CAPACITANCE (pF)
FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs LOAD CAPACITANCE
Evaluation Board
The performance of the HFA1120 may be evaluated using the HFA11XX Evaluation Board.
Spec Number 3-212
511105-883
HFA1120
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied.
The layout and schematic of the board are shown in Figure 2. To order evaluation boards, please contact your local sales office.
TOP LAYOUT
VH 1 +IN OUT V+ VL VGND
Offset Adjustment
The output offset voltage of the HFA1120 may be nulled via connections to the BAL pins. Unlike a voltage feedback amplifier, offset adjustment is accomplished by varying the sign and/or magnitude of the inverting input bias current (-IBIAS). With voltage feedback amplifiers, bias currents are matched and bias current induced offset errors are nulled by matching the impedances seen at the positive and negative inputs. Bias currents are uncorrelated on current feedback amplifiers, so this technique is inappropriate. -IBIAS flows through RF causing an output offset error. Likewise, any change in -IBIAS forces a corresponding change in output voltage, providing the capability for output offset adjustment. By nulling -IBIAS to zero, the offset error due to this current is eliminated. In addition, an adjustment limit greater than the -IBIAS limit allows the user to null the contributions from other error sources, such as VIO, or +IN source impedance. For example, the excess adjust current of 50A (IBNADJ min. - IBSN max.) allows for the nulling of an additional 26mV of output offset error (with RF = 510) at room temperature. The amount of adjustment is a function of RF , so adjust range increases with increased RF . If allowed by other considerations, such as bandwidth and noise, RF can be increased to provide more adjustment range. The recommended offset adjustment circuit is shown in Figure 3.
IN 0.1F -5V
BOTTOM LAYOUT
500 R1 1 50 2 3 4 10F
500 VH 8 7 50 6 5 GND GND OUT VL 0.1F 10F +5V
FIGURE 2. EVALUATION BOARD SCHEMATIC AND LAYOUT
510
2
-
6
VIN
HFA1120 3+ 5 1 4 10k
VOUT
V-
FIGURE 3. OFFSET VOLTAGE ADJUSTMENT CIRCUIT
Spec Number 3-213
511105-883
HFA1120
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied.
TYPICAL PERFORMANCE CHARACTERISTICS Device Characterized at: VSUPPLY = 5V, RF = 360, AV = +2V/V, RL = 100, Unless Otherwise Specified PARAMETERS Input Offset Voltage* Average Offset Voltage Drift VIO CMRR VIO PSRR +Input Current* Average +Input Current Drift -Input Current* Average -Input Current Drift -Input Current Adjust Range +Input Resistance -Input Resistance Input Capacitance Input Noise Voltage* +Input Noise Current* -Input Noise Current* Input Common Mode Range Open Loop Transimpedance Output Voltage AV = -1 AV = -1, RL = 100 AV = -1, RL = 100 Output Current* AV = -1, RL = 50 AV = -1, RL = 50 DC Closed Loop Output Resistance Quiescent Supply Current* -3dB Bandwidth* RL = Open AV = -1, RF = 430, VOUT = 200mVP-P AV = +1, RF = 510, VOUT = 200mVP-P AV = +2, RF = 360, VOUT = 200mVP-P Slew Rate AV = +1, RF = 510, VOUT = 5VP-P AV = +2, VOUT = 5VP-P Full Power Bandwidth VOUT = 5VP-P +25oC f = 100kHz f = 100kHz f = 100kHz VCM = 0V Versus Temperature VCM = 2V VS = 1.25V VCM = 0V Versus Temperature VCM = 0V Versus Temperature VCM = 0V VCM = 2V CONDITIONS TEMPERATURE +25oC Full +25oC +25oC +25oC Full +25oC Full +25oC +25oC +25oC +25oC +25oC +25oC +25oC Full +25oC +25oC Full to +125oC TYPICAL 2 10 46 50 25 40 12 40 200 50 16 2.2 4 18 21 3.0 500 3.3 3.0 65 50 0.1 24 580 850 670 1500 2300 220 UNITS mV V/oC dB dB A nA/oC A nA/oC A k pF nV/Hz pA/Hz pA/Hz V k V V mA mA mA MHz MHz MHz V/s V/s MHz
-55oC to 0oC +25oC Full +25oC +25oC +25oC +25oC +25oC +25oC
Spec Number 3-214
511105-883
HFA1120
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as application and design information only. No guarantee is implied.
TYPICAL PERFORMANCE CHARACTERISTICS (Continued) Device Characterized at: VSUPPLY = 5V, RF = 360, AV = +2V/V, RL = 100, Unless Otherwise Specified PARAMETERS Gain Flatness* CONDITIONS To 30MHz, RF = 510 To 50MHz, RF = 510 To 100MHz, RF = 510 Linear Phase Deviation* 2nd Harmonic Distortion* To 100MHz, RF = 510 30MHz, VOUT = 2VP-P 50MHz, VOUT = 2VP-P 100MHz, VOUT = 2VP-P 3rd Harmonic Distortion* 30MHz, VOUT = 2VP-P 50MHz, VOUT = 2VP-P 100MHz, VOUT = 2VP-P 3rd Order Intercept* 1dB Compression Reverse Isolation (S12) 100MHz, RF = 510 100MHz, RF = 510 40MHz, RF = 510 100MHz, RF = 510 600MHz, RF = 510 Rise & Fall Time VOUT = 0.5VP-P VOUT = 2VP-P Overshoot* Settling Time* VOUT = 0.5VP-P, Input tR/tF = 550ps To 0.1%, VOUT = 2V to 0V, RF = 510 To 0.05%, VOUT = 2V to 0V, RF = 510 To 0.02%, VOUT = 2V to 0V, RF = 510 Differential Gain Differential Phase Overdrive Recovery Time AV = +2, RL = 75, NTSC AV = +2, RL = 75, NTSC RF = 510, VIN = 5VP-P TEMPERATURE +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC TYPICAL 0.014 0.05 0.14 0.6 -55 -49 -44 -84 -70 -57 30 20 -70 -60 -32 500 800 11 11 19 34 0.03 0.05 7.5 UNITS dB dB dB Degrees dBc dBc dBc dBc dBc dBc dBm dBm dB dB dB ps ps % ns ns ns % Degrees ns
* See Typical Performance Curve for more information.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Spec Number 3-215
511105-883

▲Up To Search▲

Price & Availability of HFA1120

	To Download HFA1120 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .